joblet.ai
Find JobsNearby JobsJobs for you
Sign inEmployers / Post a Job
joblet.ai

AI-powered job search connecting talent with opportunity.

ELEVEN AI, Inc.
200 Continental Drive, Suite 401
Newark, DE 19713

Product

  • Browse Jobs
  • Job Locations
  • Browse by Companies
  • Post a Job
  • Blog
  • FAQ
  • Jobs Near Me

Company

  • About Us
  • Contact
  • Refer & Earn
  • Explore all pages

Legal

  • Privacy Policy
  • Cookie Policy
  • Terms of Service

Browse jobs by industry

  • AI
  • IT Services
  • Healthcare
  • Manufacturing & Production
  • Supply Chain
  • Infrastructure
  • Transport & Logistics
  • Real Estate
  • Finance & Accounting
  • Consulting
  • Sales & Marketing
  • Hospitality
  • Media & Entertainment
  • Education

© 2026 ELEVEN AI, Inc. joblet.ai is a product of ELEVEN AI, Inc. All rights reserved.

Overview

Company
Altera
Location
all cities, MS 26
Employment type
On-site
  • Customer Service Associate (26)
  • Principal, Digital Solutions Consultant (26)
  • Representative Lead, BPS Middle Office (26)
  • Regional Sales Director, West (26)
  • Director, Business Development (Retail Media) - Capital One Ad Solutions (Remote) (15)
  • Medical Director - Spine and Brain Surgery - Remote (12)
Back to Jobs
A
AlteraVerified Employer

Business Services & Consulting • all cities, MS 26

Design Verification Engineer (26)

all cities, MS 26On-sitePosted 9 hours ago
Business Services & Consulting

About the Role

Talented Engineer Opportunity

We're looking for a talented, self-motivated engineer to join our Design Verification team. We work on some of the most technically challenging silicon in the industry, spanning digital and analog design, DSP pipelines, and firmware-hardware co-verification.

This role is ideal for an early-career engineer who wants to build deep technical expertise in high-speed silicon verification. You'll work alongside experienced engineers on real silicon shipping to production, with plenty of opportunity to learn, grow, and take ownership as you ramp up.

Our team develops and verifies high-speed SerDes IP — the physical layer technology that moves data across PCIe, Ethernet, and other industry-standard interfaces. Getting this right matters: the world's data moves through what we build.

What You'll Do

  • Develop and maintain SystemVerilog/UVM verification environments for SerDes and PHY blocks
  • Write testbenches, functional coverage models, and assertions
  • Run simulations, analyze failures, and debug both RTL and testbench issues
  • Collaborate with design, architecture, and analog teams on block-level and top-level verification

About Altera

Altera is the world's largest independent, pure-play FPGA company. Our programmable logic devices power data centers, telecommunications infrastructure, AI accelerators, and industrial systems. Recently spun out from Intel as an independent company, we combine decades of FPGA heritage with the focus and agility of a fresh start.

Qualifications

  • BSc in Electrical Engineering, Computer Engineering, or equivalent
  • 0–5 years of experience in digital design or verification (internships, academic projects, or industry)
  • Working knowledge of SystemVerilog and basic familiarity with UVM concepts
  • Solid digital design fundamentals: synchronous logic, FSMs, pipelining, clock domain crossing
  • Strong analytical and debug mindset — you enjoy getting to the bottom of a problem
  • Good communication skills in English (spoken and written)
  • Candidates should preferably be able to reside in Lasi.

Job Type: Regular

Shift: Shift 1 (Romania)

Primary Location: Bucharest, Romania (Remote)

Additional Locations:

Posting Statement: All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Talented Engineer Opportunity

We're looking for a talented, self-motivated engineer to join our Design Verification team. We work on some of the most technically challenging silicon in the industry, spanning digital and analog design, DSP pipelines, and firmware-hardware co-verification.

This role is ideal for an early-career engineer who wants to build deep technical expertise in high-speed silicon verification. You'll work alongside experienced engineers on real silicon shipping to production, with plenty of opportunity to learn, grow, and take ownership as you ramp up.

Our team develops and verifies high-speed SerDes IP — the physical layer technology that moves data across PCIe, Ethernet, and other industry-standard interfaces. Getting this right matters: the world's data moves through what we build.

What You'll Do

  • Develop and maintain SystemVerilog/UVM verification environments for SerDes and PHY blocks
  • Write testbenches, functional coverage models, and assertions
  • Run simulations, analyze failures, and debug both RTL and testbench issues
  • Collaborate with design, architecture, and analog teams on block-level and top-level verification

About Altera

Altera is the world's largest independent, pure-play FPGA company. Our programmable logic devices power data centers, telecommunications infrastructure, AI accelerators, and industrial systems. Recently spun out from Intel as an independent company, we combine decades of FPGA heritage with the focus and agility of a fresh start.

Qualifications

  • BSc in Electrical Engineering, Computer Engineering, or equivalent
  • 0–5 years of experience in digital design or verification (internships, academic projects, or industry)
  • Working knowledge of SystemVerilog and basic familiarity with UVM concepts
  • Solid digital design fundamentals: synchronous logic, FSMs, pipelining, clock domain crossing
  • Strong analytical and debug mindset — you enjoy getting to the bottom of a problem
  • Good communication skills in English (spoken and written)
  • Candidates should preferably be able to reside in Lasi.

Job Type: Regular

Shift: Shift 1 (Romania)

Primary Location: Bucharest, Romania (Remote)

Additional Locations:

Posting Statement: All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

What You'll Do

Develop and maintain SystemVerilog/UVM verification environments for SerDes and PHY blocks
Write testbenches, functional coverage models, and assertions
Run simulations, analyze failures, and debug both RTL and testbench issues
Collaborate with design, architecture, and analog teams on block-level and top-level verification
BSc in Electrical Engineering, Computer Engineering, or equivalent
0–5 years of experience in digital design or verification (internships, academic projects, or industry)

Skills & Technologies

Business Services & Consulting

Similar jobs

Customer Service Associate (26)
EverDriven
all cities, MS 26Posted 4 days ago
Principal, Digital Solutions Consultant (26)
Starcom Mediavest Group Germany Gmbh
all cities, MS 26Posted 11 hours ago
Representative Lead, BPS Middle Office (26)
FIS
all cities, MS 26Posted 6 days ago
Regional Sales Director, West (26)
Algosec
all cities, MS 26Posted 11 hours ago
Director, Business Development (Retail Media) - Capital One Ad Solutions (Remote) (15)
Capital One
all cities, IL 15Posted 11 hours ago
Medical Director - Spine and Brain Surgery - Remote (12)
UnitedHealth Group
all cities, HI 12Posted 11 hours ago
A
Altera
Business Services & Consulting
View all jobs at Altera