Senior ASIC Verification Engineer (AI Hardware) — Remote (U.S.) — No Visa Sponsorship
Overview
Our client an AI / Compute company of the verge of being thenext Nvidia is looking for an experienced ASIC Verification Engineer to help ensure the quality, reliability, and performance of their next-generation AI-focused silicon. In this role, you'll partner closely with design, architecture, and software teams to validate complex hardware systems and contribute to cutting-edge compute solutions. This position also offers the opportunity to take ownership of verification efforts and influence best practices across projects.
Key Responsibilities
Define and drive verification strategies for advanced ASIC designs used in AI/compute workloads
Build and execute detailed verification plans, including coverage goals and validation approaches
Develop scalable verification environments using System Verilog and UVM
Create simulation infrastructure, including testbenches and both directed and constrained-random test scenarios
Work cross-functionally with design and architecture teams to achieve coverage closure and functional accuracy
Identify, debug, and resolve design issues throughout pre-silicon and early silicon validation phases
Partner with FPGA and emulation teams to support early prototyping and validation efforts
Track project milestones, manage verification deliverables, and proactively address risks
Required Background
Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related discipline
8+ years of hands-on experience in ASIC or SoC verification
Strong proficiency with System Verilog and UVM-based verification flows
Deep understanding of verification planning, coverage methodologies, and testbench architecture
Experience working with leading EDA toolchains (e.g., Cadence, Synopsys, Siemens EDA)
Solid debugging skills, including waveform analysis and scripting (Python, Tcl, or similar)
Exposure to high-performance compute architectures such as AI accelerators, memory hierarchies, or high-speed interfaces
Experience with hardware/software integration or co-verification
Familiarity with formal verification methods
Exposure to post-silicon validation, bring-up, or lab debug processes
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Senior ASIC Verification Engineer (AI Hardware)
San Jose, California, United States
About the Job
Senior ASIC Verification Engineer (AI Hardware) — Remote (U.S.) — No Visa Sponsorship
Overview
Our client an AI / Compute company of the verge of being thenext Nvidia is looking for an experienced ASIC Verification Engineer to help ensure the quality, reliability, and performance of their next-generation AI-focused silicon. In this role, you'll partner closely with design, architecture, and software teams to validate complex hardware systems and contribute to cutting-edge compute solutions. This position also offers the opportunity to take ownership of verification efforts and influence best practices across projects.
Key Responsibilities
Define and drive verification strategies for advanced ASIC designs used in AI/compute workloads
Build and execute detailed verification plans, including coverage goals and validation approaches
Develop scalable verification environments using System Verilog and UVM
Create simulation infrastructure, including testbenches and both directed and constrained-random test scenarios
Work cross-functionally with design and architecture teams to achieve coverage closure and functional accuracy
Identify, debug, and resolve design issues throughout pre-silicon and early silicon validation phases
Partner with FPGA and emulation teams to support early prototyping and validation efforts
Track project milestones, manage verification deliverables, and proactively address risks
Required Background
Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related discipline
8+ years of hands-on experience in ASIC or SoC verification
Strong proficiency with System Verilog and UVM-based verification flows
Deep understanding of verification planning, coverage methodologies, and testbench architecture
Experience working with leading EDA toolchains (e.g., Cadence, Synopsys, Siemens EDA)
Solid debugging skills, including waveform analysis and scripting (Python, Tcl, or similar)
Exposure to high-performance compute architectures such as AI accelerators, memory hierarchies, or high-speed interfaces
