Business Services & Consulting • all cities, VA 46
Lead ASIC DFT Engineer (46)
all cities, VA 46On-sitePosted 1 day ago
Business Services & Consulting
About the Role
Lead Asic Dft Engineer
Tekfortune is a fast-growing consulting firm specialized in permanent, contract & project-based staffing services for world's leading organizations in a broad range of industries. In this quickly changing economic landscape, virtual recruiting and remote work are critical for the future of work. To support the active project demands and skills gaps, our staffing experts can help you find the best job for you. Role: Lead Asic Dft Engineer Location: Remote Duration: 1 year Required Skills: Asic
Experience Required:
10+ years of hands-on experience in Asic Design-for-Test (Dft)
Role Summary: We are seeking a highly experienced Lead Asic Dft Engineer to architect, implement, verify, and debug advanced Dft solutions for complex Asic and Soc designs. This role requires deep technical ownership across Dft architecture, scan insertion, Atpg, MbisT/LbisT, Jtag, boundary scan, and post-silicon validation, along with the ability to lead cross-functional debug efforts and drive resolution of critical silicon issues.
Key Skills Required:
Strong hands-on Asic Dft experience with end-to-end ownership
Deep expertise in scan architecture, Atpg, MbisT, LbisT, Jtag, boundary scan, and silicon debug
Experience with Synopsys, Cadence, and Siemens/Mentor Eda tools
Strong background in scan insertion, scan chain stitching, Atpg setup, simulation, debug, and Drc analysis
MbisT implementation and verification; Sms experience preferred
Tessent/Ssn experience preferred
Strong understanding of Plls, Rtl design, synthesis, Lec, and physical design flows
Post-silicon debug and silicon bring-up experience
Tcl, Perl, or Python scripting experience is highly preferred
Lead Asic Dft Engineer
Tekfortune is a fast-growing consulting firm specialized in permanent, contract & project-based staffing services for world's leading organizations in a broad range of industries. In this quickly changing economic landscape, virtual recruiting and remote work are critical for the future of work. To support the active project demands and skills gaps, our staffing experts can help you find the best job for you. Role: Lead Asic Dft Engineer Location: Remote Duration: 1 year Required Skills: Asic
Experience Required:
10+ years of hands-on experience in Asic Design-for-Test (Dft)
Role Summary: We are seeking a highly experienced Lead Asic Dft Engineer to architect, implement, verify, and debug advanced Dft solutions for complex Asic and Soc designs. This role requires deep technical ownership across Dft architecture, scan insertion, Atpg, MbisT/LbisT, Jtag, boundary scan, and post-silicon validation, along with the ability to lead cross-functional debug efforts and drive resolution of critical silicon issues.
Key Skills Required:
Strong hands-on Asic Dft experience with end-to-end ownership
Deep expertise in scan architecture, Atpg, MbisT, LbisT, Jtag, boundary scan, and silicon debug
Experience with Synopsys, Cadence, and Siemens/Mentor Eda tools
Strong background in scan insertion, scan chain stitching, Atpg setup, simulation, debug, and Drc analysis
MbisT implementation and verification; Sms experience preferred
Tessent/Ssn experience preferred
Strong understanding of Plls, Rtl design, synthesis, Lec, and physical design flows
Post-silicon debug and silicon bring-up experience
Tcl, Perl, or Python scripting experience is highly preferred
What You'll Do
10+ years of hands-on experience in Asic Design-for-Test (Dft)
Strong hands-on Asic Dft experience with end-to-end ownership
Deep expertise in scan architecture, Atpg, MbisT, LbisT, Jtag, boundary scan, and silicon debug
Experience with Synopsys, Cadence, and Siemens/Mentor Eda tools
Strong background in scan insertion, scan chain stitching, Atpg setup, simulation, debug, and Drc analysis
MbisT implementation and verification; Sms experience preferred
